1/4 rev. b structure silicon monolithic integrated circuits product series 2ch dc brush motor driver type BD63821EFV function ? pwm constant current controllable two h bridge driver ? forward, reverse, brake and stop function ? direct pwm control absolute maximum ratings(ta=25c) item symbol ratings unit supply voltage v cc1,2 -0.3 +36.0 v power dissipation pd 1.45 1 w 4.70 2 w input voltage for control pin v in -0.3 +7.0 v rnf voltage v rnf 0.7 v output current i out 1.0 3 a/ch output current(peak) 4 i outpeak 1.5 3 a/ch fault, lock voltage v fault -0.3 +7.0 v fault, lock current i fault 5 ma operating temperature range t opr -25 +85 c storage temperature range t stg -55 +150 c junction temperature t jmax +150 c 1 70mm 70mm 1.6mm glass epoxy board. derating in done at 11.6mw/c for operating above ta=25c. 2 4-layer recommended board. derating in done at 37.6mw/c for operating above ta=25c. 3 do not, however exceed pd, aso and tjmax=150c. 4 pulse width tw Q20ms. operating conditions (ta=-25 +85c) item symbol min. typ. max. unit supply voltage v cc1,2 19 24 28 v input voltage for control pin v in 0 - 5.5 v pwm input frequency f in - - 100 khz this product isn?t designed for protection against radioactive rays.
2/4 rev. b electrical characteristics (unle ss otherwise specified ta=25c, v cc1,2 =24v) item symbol limit unit conditions min. typ. max. whole circuit current at standby i ccst - 1.0 2.5 ma ps=0v circuit current i cc - 2.5 5.0 ma ps=in1a=in2a=5v control input (in1a, in1b, in2a, in2b, ps) h level input voltage v inh 2.0 - - v l level input voltage v inl - - 0.8 v h level input current i inh 35 50 100 a v in =5v l level input current i inl -10 0 - a v in =0v fault lock output (fault, lock) output low voltage v fault - 50 100 mv i fault =1ma output leak current i fault_leak - - 10 a v fault =5v output (out1a, out1b, out2a, out2b) output on resistance r on - 1.90 2.50 ? i out =0.5a, sum of upper and lower output leak current i leak - - 10 a current control rnfxs input current i rnfs -2.0 -0.1 - a rnfxs=0v rnfx input current i rnf -40 -20 - a rnfx=0v vrefx input current i vref -2.0 -0.1 - a vrefx=0v vrefx input voltage range v ref 0 - 3.0 v minimum on time (blank time) t onmin 0.7 1.5 3.0 s current limit comparator threshold v cth 0.57 0.60 0.63 v vrefx=3v
3/4 rev. b package outline block diagram pin no. / pin name pin no. pin name pin no. pin name 1 gnd 15 lock 2 out1b 16 in1a 3 rnf1 17 in1b 4 rnf1s 18 test 5 out1a 19 in2a 6 nc 20 in2b 7 vcc1 21 nc 8 nc 22 vcc2 9 gnd 23 nc 10 cr 24 out2a 11 vref1 25 rnf2s 12 vref2 26 rnf2 13 ps 27 out2b 14 fault 28 nc nc : non connection in1b in2b predriver 7 vcc1 uvlo regulator in1 a 17 vref1 2 out1b 5 out1a 3 rnf1 22 vcc2 24 out2a 27 out2b 26 rnf2 control logic osc ovlo rnf1s in2 a forward reverse brake open forward reverse brake open 14 fault 4 rnf1s 25 rnf2s c r test ps 1/5 vref2 rnf2s 1/5 blank time pwm control tsd ocp 15 lock 16 10 12 11 19 20 13 18 1 gnd gnd 9 htssop-b28 (unit:mm) lot no. product no. BD63821EFV
4/4 rev. b operation notes (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temper ature range of operating conditions, etc., can break down the devices, thus ma king impossible to identify breaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) power supply lines as return of current regenerated by back emf of mo tor happens, take steps such as putting capacitor between power supply and gnd as an electric pathway for the regenerated current. be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. if the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. it is recommended to implement a physical safety measure such as the in sertion of a voltage clamp diode between the power supply and gnd pins. (3) gnd potential the potential of gnd pin must be minimu m potential in all operating conditions. (4) metal on the backside (define the side wher e product markings are printed as front) the metal on the backside is shorted wi th the backside of ic chip therefor e it should be c onnected to gnd. be aware that there is a possibility of malfunction or destruction if it is shorted with any potential other than gnd. (5) thermal design use a thermal design that allows for a sufficient margin in light of the power dissipation (pd) in actual operating conditions. this ic exposes the metal on the backside of package. note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency. try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. (6) operation in strong electromagnetic field use caution when using the ic in t he presence of a strong electromagnet ic field as doing so may cause the ic to malfunction. (7) aso when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. (8) thermal shutdown circuit the ic has a built-in thermal shutdown circuit (tsd ci rcuit). if the chip temper ature becomes tjmax=150c, and higher, coil output to the motor will be open. the tsd circuit is designed only to shut the ic off to prevent runaway thermal operation. it is not designed to protect or indemnify peripheral equipment. do not use the tsd function to protect peripheral equipment. (9) over current protection circuit the ic has a built-in over current protection circuit (o cp circuit). the ocp circuit is designed only to shut the ic off to prevent abnormal si tuations, when absolute maximum outpu t current is exceeded. it is not designed to protect or indemnify peripheral equipment. do not use the ocp function to protect peripheral equipment. (10) ground wiring pattern when using both large current and small signal gnd patte rns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. (11) test pin be sure to connect test pin to gnd.
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